1. Field of the Invention
The present invention relates to a data erasing method which in particular is applied in a nonvolatile semiconductor memory device including a charge storage unit having an ONO (oxide-nitride-oxide) structure, and to a nonvolatile semiconductor memory device which in particular applies such data erasing method.
2. Background Information
One conventional type of nonvolatile semiconductor memory device would be a so-called single-cell two-bit nonvolatile semiconductor memory device in which each memory cell has two charge storage units and two resistance change layers (e.g., Japanese Laid Open Patent Application No. 2005-64295, hereinafter referred to as patent reference 1). In such nonvolatile semiconductor memory device, the charge storage units are arranged on both sides of the gate electrode, i.e., on a drain side and a source side, respectively, and the resistance change layers are arranged in semiconductor layers underneath the charge storage units, respectively.
Each charge storage unit has a structure in which a nitride film is sandwiched in between two oxide films. In the following, such structure will be referred to as an ONO (oxide-nitride-oxide) structure. In this structure, the nitride film functions as a charge storage film for storing entering electrical charges. The oxide films function as potential barrier films for trapping electrical charges inside the charge storage film.
In writing into the charge storage unit having the structure as described above, if a theoretical value ‘0’ is to be written to the charge storage unit on the drain side, positive potential will be supplied to the drain, higher potential than that of the drain will be supplied to the gate, and the source will be at ground potential. Under these conditions, the electric field will be concentrated around a resistance change layer on the drain side where the impurity concentration is lower than that of the drain. Thereby, hot carriers will be generated in the resistance change layer on the drain side due to collisional ionization, and as the hot carriers enter the nitride film through the oxide film functioning as a potential barrier film, data will be written into the charge storage unit.
In addition, before shipping the nonvolatile semiconductor memory device as described above, an operation test will be done and then data meeting the needs of the shipping destination will be written therein. In this operation test, for instance, first, a reading test will be done under a state where no data has been written, and after that, a theoretical value ‘0’ will be written into the charge storage unit in each memory cell, and then it will be confirmed whether the written data can be read out properly. After the confirmation, the data written for the test will be erased. Under a state where data has not been written, each charge storage unit keeps a theoretical value of ‘1’. Normally, this operation test will be conducted while the nonvolatile semiconductor memory devices are still in a wafer state, i.e., while the devices are not yet diced into individual pieces.
In erasing the data written for the test, normally, a high temperature neglect method will be applied. In this method, a wafer in which multiple nonvolatile semiconductor memory devices are formed will be left inside a high temperature container at a temperature of 300 to 400° C. for more than 100 hours, for instance. By this process, the data written in all the memory cells can be erased collectively.
However, with respect to such erasing method, the necessity of a long period of time of 100 hours or more will lead to a problem of decreasing manufacturing productivity and increasing manufacturing cost. In addition, with respect to this method, there is still a problem that the written data cannot be erased to a sufficient extent.
In order to resolve such problems, it is possible to use a method of erasing data electrically. In this erasing method, a bias potential will be applied in between the drain and the source for about a few milliseconds to one second, for instance. By this arrangement, hot carriers (e.g., hot holes) having opposite polarity to that of hot carriers (e.g., hot electrons) used at the time of data writing will be generated, and as these hot carriers enter the nitride film penetrating through the oxide film functioning as a potential barrier film, electrical charges having been kept in the nitride film will be neutralized, and as a result, the stored data will be erased.
However, in such electrical erasing method, a gate oxide film of a memory cell that is the object of erasure will be damaged electrically at the time of erasure. This will lead to deterioration in the disturb characteristic of the nonvolatile semiconductor memory device. Here, the disturb characteristic is defined as an influence that a certain memory cell will receive by writing actions with respect to other memory cells. Accordingly, a good disturb characteristic indicates that a certain memory cell will receive little influence by writing actions with respect to other memory cells.
With respect to the data erasing method, other than the two methods introduced above, there is a method using ultraviolet (UV) radiation. In this method, however, there are certain limits to the structures, such as the thickness of the nitride film that is the charge storage film, and the impurity concentration of the resistance change layer under the nitride film, which leads to a problem of deteriorating design flexibility.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved data erasing method and an improved method of manufacturing a nonvolatile semiconductor memory device. This invention addresses this need in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.